Milwaukee 6184-01 Operations Instructions Page 34
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FRONT-PANEL
DISTRIBUTION
The
Front-Panel
Distribution
diagram
shows
the
interconnections
between
front-panel
functions
(controls,
connectors,
and
indicators)
and
circuit
boards
in
the
7887
.
TRIGGER
GENERATOR
The
Trigger
Generator
provides
a
stable
display
by
starting
the
Sweep
Generator
(diagram
4)
at
a
selected
point
on the
input
waveform
.
The
triggering
point
can
be
varied
by the
LEVEL
control
and
may
occur on
either
the
positive
or
negative
slope
of
the
waveform
.
The
triggering
signal
source
may
come
from
the
signal
being
displayed
(INT),
and
external
source
(EXT),
or
a
sample
of
the
power-line
voltage
(LINE)
.
Figure
3-2
is
a
block
diagram
of
the
Trigger
Generator
.
EXTERNAL
SOURCE
The
external
trigger
signal
is
connected
to
the
Trigger
Generator
through
EXT
TRIG
IN
connector
J2
.
When
released,
push-button
switch
S10
provides
10
times
attenuation
of
the
external
trigger
input
signal
.
WhenSOURCE
switch
(S50)
is
set
to
EXT
and
the
COUPLING
control
set
to
AC,
external
signals
below
approximately 16
kilohertz
are
coupled
through
R15,
C15
and
R20
to
Q22
.
Triggering signals
above
16
kilohertz
are
coupled through
C20
to
the
gate
of
Q22A
.
Field-effect
transistors
Q22A
and
Q22B
form
a
unity-gain
source
follower,
which
couples the
external
trigger
signal
to
the
Trigger
Source
Selector
and
Amplifier stage
(U65
pin
4)
.
Diodes
CR23
and
CR24
protect
the
input
by
clamping
it
within
a diode drop
of
ground
(approximately
0
.7
volt)
.
INTERNAL
AND
LINE
SOURCE
The
internal
trigger
signal
from
the
vertical
channel(s)
of
the
mainframe
is
connected
to
the
Internal
Trigger
Amplifier stage
(U35)
differentially
via
interface
connector
pins
A20
and
B20
.
Internal
trigger
signals
with frequencies
above
16
kilohertz
are
coupled
through
C37
directly
into
the
Trigger
Source
Selector
and
Amplifier
stage
(U65
pin
8)
.
Internal
trigger
signals
with frequencies
below
16
kilohertz
are
coupled
differentially
through
R31
and
R33
to
U35
pins
2
and
3
.
The
single-ended
output
at
U35
pin
6
is
coupled,
along with the
offset
from
LEVEL
control
R60,
to
U65
pin
10
.
Ac
coupling
is
provided
by
C43
.
A
sample
of
the
line
voltage
is
connected
to
the
trigger
circuits
via
interface
connector
pin
A4
.
The
line
signal
connects
to
the
Trigger
Source
Selector
and
Amplifier
stage
at
U65
pin
2
.
TRIGGER
SOURCE
SELECTOR
AND
AMPLIFIER
The
Trigger
Source
Selector
and
Amplifier
stage
(partial
U65)
selects
the
triggering signal
source
from
the
signal
being
displayed
(INT),
an
external
source
(EXT),
or
a
sample
of
the
power
line
voltage
(LINE)
.
The
trigger
source
is
selected
by
SOURCE
switch
S50
.
The
voltage
offset
from
LEVEL
control
R60
is
coupled
to
U65
pin
10
.
The
differential
trigger
output
signal
from
U65
pins
16
and
17
is
coupled
to
the Slope
Selector
and
Trigger
Generator
stage
(U85)
.
High-frequency
reject
coupling
is
provided
in
the
Trigger
Source
Selector
stage
.
When
the
AC
HF
REJ
push
button
is
pressed,
R68,
C68
and
components
internal
to
U65
pin
9
form
a high-frequency
rejection
filter
.
Only
low-
frequency
ac
triggering
signals
are
accepted
.
PEAK-TO-PEAK
AUTO
The
Peak-to-Peak
Auto
function
can
be
divided
into
3
distinct
blocks
.
First,
the
Peak
Detector
determines
signal
size
and
do
positioning
.
Second,
a
DC
Centering
loop
centers the peak-detected
output
regardless
of
the
do
input
and
off-set
voltages
.
"Third,
the Peak-to-Peak
Level
Range
output
voltage
is
automatically
adjusted
until
the
trigger
output
reaches
the
clamp
level
set
by the
Automatic
Gain
Control
to
achieve
full
level
range
(refer
to
the
Specification section
in
this
manual
for
level
range
parameters)
.
Peak
Detector
Peak-to-Peak
Level
Range
Theory
of
Operation---7B87
The
peak
detector
outputs from
U65
pins
14
and
15,
rectified
within
U65,
are
externally
filtered
by
C73
and
C74
.
Secondary
stages
of
peak
detection
for
the
positive
and
negative
detector
signals
are
provided
by
U75A-
CR71-C72
and
U75B-CR75-C76
.
Outputs
from
the Peak
Detector
stage
are
coupled
to
the Peak-to-Peak
Level
Range
and
DC
Centering stages
.
DC
Centering
Operational
amplifier
U55B
adjusts
the
input
level
at
U65
pin
10
to
null
the do
input
voltage
and
accumulated
do
offsets
.
This
allows
the
trigger
outputs
at
U65
pins
16
and
17
to
balance
when
LEVEL
control
R60
is
set
to
zero
.
DC
Balance
adjustment
R85
provides
centering
for
offset
voltages
due
to
U85
.
The
Peak-to
Peak
Level
Range
stage
amplifies the
peak
Detector
signals
to
provide
constant-amplitude
trigger
signals
and
to
establish
the
range
of
the
front-panel
LEVEL
control
.
Peak
Detector
signal
amplitude
depends
on
triggering
(input)
signal
amplitude
.
Peak
Detector
signals
from
R58-R59
are coupled
to
U55A
pin
3
of
the Peak-to-Peak
Level
Range
stage
.
The
gain
of
3-3
- WARNINGS 7
- QUALIFIED 9
- PERSONNEL 9
- PROCEDURE 11
- OPERATING 16
- TIME-INTERVAL 22
- MEASUREMENTS 22
- C1985-12 24
- TRIGGERING 27
- FRONT-PANEL 34
- Operation 40
- .----7B57 40
- 2788-106 42
- T- T- T 45
- INSPECTION 50
- LUBRICATION 50
- Maintenance--7881 52
- STATIC-SENSITIVE 54
- TROUBLESHOOTING 55
- EQUIPMENT 55
- TECHNIQUES 55
- OBTAINING 57
- REPLACEMENT 57
- SOLDERING 58
- COMPONENT 59
- ADJUSTMENT 65
- INSTRUMENT 65
- REPACKAGING 65
- PRELIMINARY 66
- REQUIRED 66
- Effective 90
- VERTICAL_ 99
- AMPLIFIER 99
- FROM'PANEL 103
- DISTRIBUTION 103
- 2788-201 107
- 2788-203 116
- GENERATOR 117
- """" 120
- ___ .___ 123
- ]INDICATED 127
- VIATIONS 133
- Digitally signed by 134
- INFORMATION 142
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